Newly Released SMARC Module Specification Revision 2.1 Positions It as the First Open AIoM (AI on Module) Specification

New Specification Anticipates the Needs of the AI and Robotics Markets

ADLINK Technology, a global leader in edge computing and one of the main contributors to the SMARC SGET committee, is pleased to announce the release of SMARC module Revision 2.1. The Standardization Group for Embedded Technologies, SGET, has just released the new, future-proof specification 2.1. It is fully backward compatible with the current specification 2.0 since the new features can either be multiplexed with existing signals or are additions that do not compromise pins on the edge connector already assigned in the 2.0 specifications.

The major feature updates are:

  • Support of up to 4 MIPI CSI ports to anticipate the needs of the AI and Robotics markets.
  • Allow multiplexing of SERDES signals over the 3rd and 4th  PCIe x1 interfaces for additional Ethernet ports.
  • Various minor additions over earlier reserved pins such as plus 2 GPIO pins and PCIe clock request signals.

By allowing up to 4 native CSI MIPI camera inputs, the SGET 2.1 specification addresses the fast-growing trend of SOCs that come with integrated Neural Processing Units (NPUs) and multiple camera inputs for video-based AI solutions. The third and fourth camera port are realized through FFC feature connectors on the module itself, each supporting up to 4 MIPI CSI data lanes. Multi camera support is needed for 360-degrees situational awareness for the fast-growing segments such as Robotic vehicles and autonomous driving both of which draw heavily on AI. The specification update positions SMARC as the preferred standard for scalable, low power, silicon independent AIoM (AI on Module) solutions in the industrial embedded market.
I-Pi SMARC module image.
To allow multiplexing SERDES signals over the 3rd and 4th PCIe x1 interfaces, is adding the support for an additional two Ethernet ports. This potentially allows a module to work with up to 4 GbE Ethernet ports. These ports can again support the same number of GigE-Vision cameras with a strong focus on AI vision applications.

“The AI in computer vision market, valued at around USD 2.5 billion in 2017, is expected to reach USD 25 billion by 2023, with a CAGR of 45% during the forecast period. Robotics and Machine Vision applications are to hold the biggest share of that significant increase. Most of these applications require low power envelopes because they are either battery powered or build into fan-less, air-tight enclosures, such as Smart Cameras. The new SMARC AIoM proposition is excellently positioned, supporting long lifecycles, extreme temperatures, high MTBF and other must have industrial characteristics” says Henri Parmentier who manages the SMARC product line for ADLINK Technology.

Besides the above functional changes, the specification itself saw a major structural overhaul to make it more readable. Great attention was given to generate more precise and detailed information about every pin’s power domain and PU/PD status. This effort will simplify carrier board designs and it will increase the level of compatibility and interoperability between module designs, both for different technologies (x86 and ARM) and different vendors.

SMARC clearly stands out as the only truly open, versatile, future proof, low power COM/AIoM standard in a highly fragmented market with a multitude of alternative form factors. Most of these “proprietary alternatives” are either silicon dependent, badly documented, undergoing continuous changes, or are going to be abandoned altogether. As proof of this trend, the SMARC module form factor products are actively being designed and produced by more than 20 leading embedded companies worldwide, with more companies joining in every year. 

The complete SMARC module 2.1 specification document is available on the SGeT website ( for a free download. 

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