From SMARC to OSM: The Easy Migration Guide for i.MX8MP Users
Moving from SMARC to OSM doesn’t mean starting over — it means getting smaller, smarter, and faster. This guide walks you through everything you need to know to make the switch smoothly.
1. Why This Migration Matters
If you're already using ADLINK’s LEC-IMX8MP (SMARC) module, you’ve experienced strong performance and reliability. Now, the new OSM-IMX8MP brings the same NXP i.MX8M Plus power into a smaller, solderable form factor — perfect for compact and rugged systems.
Think of it like moving from a plug-in board to a built-in brain — less mechanical risk, more automation, and long-term availability.
2. Meet the Two Modules
Here’s a quick look at what’s changing and what’s not:
 |
 |
| LEC-IMX8MP | OSM-IMX8MP |
| Feature | SMARC LEC-IMX8MP | OSM-IMX8MP |
|---|---|---|
| Form Factor | SMARC 2.1 (82×50 mm) | OSM 1.1 Size-L (45×45 mm) |
| Connector | MXM edge | LGA (solderable) |
| DDR | LPDDR4L | LPDDR4L |
| eMMC | 16–256 GB | 32–128 GB |
| Ethernet | 2x GbE (TSN) | 2x GbE (TSN) |
| USB | 2x USB3 + 3x USB2 | 2x USB3 + 2x USB2 |
| I²C Buses | 5 | 2 |
| GPIO Pins | 14 | 8 |
| Display | HDMI + LVDS + DSI | HDMI + LVDS + DSI |
Same SoC, same performance, smaller footprint.
3. The Big Picture — Migration Flow
4. What You Can Reuse
Most of your existing BSP setup already works out of the box. Here’s what stays the same:
| Software Component | Reuse? | Notes |
|---|---|---|
| U-Boot | Yes | Only update board name in DTS |
| Linux Kernel | Yes | Same SoC, same configuration |
| Yocto Layers | Yes | Keep meta-nxp and meta-adlink |
| Firmware (GPU/NPU/VPU) | Yes | No binary changes |
| Build Version | Yes | Kirkstone / Scarthgap supported |
In short: Don’t rebuild everything. Just rename and rebuild the image with new device-tree references.
5. What Needs a Small Tweak
These are the only parts you’ll touch — simple and quick.
-
Device Tree: Rename from
smarc-imx8mp.dts→osm-imx8mp.dts -
I²C: Reduce from 5 buses to 2
-
UART: Add one more port if needed
-
SDIO: Update for dual slots (
sdioA/sdioB) -
PCIe: Check single-lane configuration
-
GPIO: Update numbering in DTS and overlays
-
SPI: Increased from 2 buses to 3
No kernel patches or driver rewrites required — just remap pins.
6. DDR Memory Training — Simplified
When you power up the board, the i.MX8MP automatically trains DDR memory timing using NXP’s firmware. This step ensures stable DRAM performance.
| What Happens | Do You Need to Change It? |
|---|---|
| DDR initialized in U-Boot SPL | Already handled |
Training binary (ddr_fw_imx8mp.bin) |
Reused |
| DDR timing layout | Only if you customize the hardware |
If you’re using ADLINK’s OSM reference design, no retraining is needed. If you design your own OSM carrier, run NXP’s ddr_tool_v3.x once and you’re done.
7. Aligning Carrier Board and BSP
Hardware checklist
-
Re-route I/O based on OSM pinout (smaller LGA footprint)
-
Confirm reset and power sequencing (AT mode = always boot)
-
Adjust camera interface from dual CSI → single CSI4L
-
Keep 5V ±5% power input
Software checklist
-
Set
MACHINE = "osm-imx8mp"inlocal.conf -
Update device tree and image recipe
-
Verify boot args and UART console
-
Flash, boot, test — done!
8. Quick Reference: Modify vs. Reuse
| Category | Modify | Reuse |
|---|---|---|
| Device Tree | GPIO, I²C, UART, CSI, SPI nodes | CPU, GPU, VPU, Display |
| Yocto Config | Machine name, DTS path | meta layers |
| Bootloader | Board ID, DT reference | Configs & scripts |
| Kernel | Pinmux, GPIO headers | Drivers & features |
| Carrier Board | Connector layout | Power rail logic |
9. Conclusion — The Shorter Path to Production
Migrating from SMARC to OSM is not a redesign — it’s a smart update. You’re keeping 90% of the software stack while gaining a smaller, stronger, solder-down module ideal for Industry 4.0, robotics, and edge AI.
Less rework. Less testing. Faster time-to-market. Your existing Yocto BSP already knows the way — you just give it a new home.